library ieee;
use ieee.std_logic_1164.all;

entity tri_state is
    port(en  : in std_logic;
         data_in  : in std_logic_vector(3 downto 0);
         data_out : out std_logic_vector(3 downto 0));
end tri_state;

architecture JMJS_Logic of tri_state is
begin
    process(data_in, en)
    begin
        if(en = '1') then
	    data_out <= data_in;
	else
	    data_out <= "ZZZZ";
	end if;
    end process;
end JMJS_Logic;