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[Verilog]fdisplay fopen fscanf
# 87 JMJS    11.1.24 15:09

integer file1;
initial file1=$fopen("jfile.out);
always @(reset or clock) $fdisplay(file1,"%t %x %x",$time,reset,clock);

`define        OUTPUT_FILE        {`TV_DIR,"/1_OUTPUT.DAT"}

integer        f1_file;
integer        f1_r;

initial begin
        f1_file=$fopen(`OUTPUT_FILE,"r");
end
reg        [23:0]         f1_DATA;
always @(posedge PXCLK or negedge RESETn) begin
        if(!RESETn)        ;
        else if(oDE) begin
                f1_r=$fscanf(f1_file,"%h\n",f1_DATA);
                if(f1_DATA != oDATA) begin
                        $display("GOLDEN:%x != oDATA:%x",f1_DATA,oDATA);
                        SIM_FAIL;
                end
        end
end

게시물: 93 건, 현재: 1 / 1 쪽
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