module JPIPE ();
parameter LEN=2, WID=2, INIT=0;
input [WID-1:0] din;
output [WID-1:0] dout;
reg [WID-1:0] d[0:LEN-1];
integer i;
always@(posedge clk or negedge rest) begin
   if(! resetn) for(i=0;i<LEN;i=i+1) d[i]<=INIT;
   else begin
      d[0] <= din;
      for(i=0;i<LEN-1;i=i+1) d[i+1]<=d[i];
   end
end

assign dout=d[LEN-1];
endmodule