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# 13 Jamie    02.8.29 13:25

1.Spec

up count를 설계해 봅시다. 입력 bit수는 12bit입니다.
시스템 clock인 clk의 상승에서 카운터의 출력 c_out[11:0]이 '1'씩 증가합니다.
만약 rst가 '1'이면 카운터의 출력은 '0'으로 초기화 되고, 그렇지 않은 경우
카운터를 합니다,
가장 기본적인 count이므로 쉽게 이해할 수 있을 겁니다.

2.Input/Output



3.Timing



4.Block Diagram



5.RTL Code : up_count.vhd
  Test Vector : up_count_tb.vhd

게시물: 93 건, 현재: 1 / 1 쪽
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