LogIn E-mail
¼³°èÀ̾߱â
Mini Vending Machine1
# 20 Jamie    02.12.10 12:07

1.Spec

   Mini vending machine1Àº mini vending machine°ú functionÀº µ¿ÀÏÇϳª
architecture¹®À» º¯ÇüÇÏ¿´½À´Ï´Ù.
   Ãâ·Â¿¡ ´ëÇØ °¢°¢ÀÇ process¹®À» »ç¿ëÇÏ¿© ȸ·Î¸¦ Á» ´õ »¡¸® ÀÌÇØÇϵµ·Ï ÇÏ¿´½À´Ï´Ù.
   µðÀÚÀο¡ µû¶ó Descriptin¹æ½ÄÀÌ ¾î´À °ÍÀÌ º¸´Ù È¿¿ïÀûÀÎÁö °áÁ¤µÇ°ÚÁö¸¸
ÇϳªÀÇ Ãâ·Â¿¡ ÇϳªÀÇ process¹®À» ÇÒ´çÇÏ´Â °ÍÀ» ¿ì¼±ÇÕ´Ï´Ù.

2.Input/Output



3.Timing



4.Block Diagram



5.VHDL Code : mini_vending_machine1.vhd
  Test Vector : mini_vending_machine1_tb.vhd

°Ô½Ã¹°: 96 °Ç, ÇöÀç: 1 / 1 ÂÊ
¹øÈ£ Á¦       ¸ñ ÀÛ¼ºÀÚ µî·ÏÀÏ ¹æ¹®
98  interface JMJS 25.1.20 342
97  test plusargs value plusargs JMJS 24.9.5 355
96  color text JMJS 24.7.13 402
95  draw_hexa.v JMJS 10.6.17 2553
94  jmjsxram3.v JMJS 10.4.9 2493
93  Verilog document JMJS 11.1.24 3079
92  [verilog]o=(c1)? (c2)? 0:1 : (c3)? 2:3; JMJS 09.3.31 2678
91  [verilog]forever, repeat, strobe, realtime, ... JMJS 09.7.6 4120
90  gtkwave PC version JMJS 09.3.30 2508
89  ncsim option example JMJS 08.12.1 4858
88  [¿µ»ó]keywords for web search JMJS 08.12.1 2462
87  [Verilog]fdisplay fopen fscanf JMJS 11.1.24 6560
86  ncverilog option example JMJS 10.6.8 8312
85  [Verilog]Latch example JMJS 08.12.1 3048
84  Pad verilog example JMJS 01.3.16 4998
83  [ModelSim] vector JMJS 01.3.16 2681
82  RTL Code ºÐ¼®¼ø¼­ JMJS 09.4.29 2926
81  [temp]PIPE JMJS 08.10.2 2330
80  [temp]always-forever ¹«ÇÑ·çÇÁ JMJS 08.10.2 2409
79  YCbCr2RGB.v JMJS 10.5.12 2581
78  [VHDL]rom64x8 JMJS 09.3.27 2126
77  [function]vector_compare JMJS 02.6.19 2004
76  [function]vector2integer JMJS 02.6.19 2252
75  [VHDL]ram8x4x8 JMJS 08.12.1 1951
74  [¿¹]shift JMJS 02.6.19 2430
73  test JMJS 09.7.20 2284
72  test JMJS 09.7.20 1801
71  test JMJS 09.7.20 2011
70  test JMJS 09.7.20 2089
69  test JMJS 09.7.20 2143
68  test JMJS 09.7.20 2086
67  test JMJS 09.7.20 2022
66  test JMJS 09.7.20 1960
65  test JMJS 09.7.20 2087
64  test JMJS 09.7.20 2263
63  test JMJS 09.7.20 2319
62  test JMJS 09.7.20 2190
61  VHDLÀÇ ¿¬»êÀÚ ¿ì¼±¼øÀ§ JMJS 09.7.20 3975
60  test JMJS 09.7.20 1730
59  test JMJS 09.7.20 2124
58  test JMJS 09.7.20 2036
57  test JMJS 09.7.20 1993
56  test JMJS 09.7.20 2042
55  verilog Çаú »ùÇð­ÀÇ JMJS 16.5.30 2440
54  [verilog]create_generated_clock JMJS 15.4.28 2436
53  [Verilog]JDIFF JMJS 14.7.4 1880
52  [verilog]parameter definition JMJS 14.3.5 2150
51  [verilog]sformat fopen fscanf fwrite fclose JMJS 12.1.31 5094
50  Verilog File I/0,Verilog file handling JMJS 12.1.30 2708
49  Verdi JMJS 10.4.22 3636
48  draw hexa JMJS 10.4.9 2098
47  asfifo - Async FIFO JMJS 10.4.8 1962
46  VHDLÀ» ÀÌ¿ëÇÑ È¸·Î¼³°èÀÇ ÀåÁ¡ JMJS 02.3.14 3650
45  synplify batch JMJS 10.3.8 2860
44  ÀüÀڽðè Type A JMJS 08.11.28 2371
43  I2C Webpage JMJS 08.2.25 2189
42  PC¿¡¼­ °£´ÜÈ÷ Verilog ½ÇÇàÇØº¸±â (Icarus Verilog) JMJS 13.1.14 6256
41  [Verilog]vstring JMJS 17.9.27 2377
40  Riviera Simple Case JMJS 09.4.29 3464
39  [VHDL]DES Example JMJS 07.6.15 3358
38  [verilog]RAM example JMJS 09.6.5 3123
37  ROM example [VerilogHDL, RTL] JMJS 04.5.27 2360
36  Jamie's VHDL Handbook JMJS 08.11.28 3055
35  Dualport RAM example [VerilogHDL, RTL] JMJS 04.5.27 3644
34  RTL Job JMJS 09.4.29 2574
33  [VHDL]type example - package TYPES JMJS 06.2.2 1989
32  [verilog]`define `ifdef `elsif `else `endif ... JMJS 10.5.11 9691
30  [verilog]array_module JMJS 05.12.8 2591
29  [verilog-2001]generate JMJS 05.12.8 3740
28  protected JMJS 05.11.18 2416
27  design¿¡ latch°¡ ÀÖÀ¸¸é ¾ÈµÇ³ª¿ä? JMJS 09.7.20 3124
26  busÀÇ µ¥ÀÌŸ¸¦ °¢ bitº°·Î Ãâ·ÂÇÏ´Â ¹æ¹ýÀº? JMJS 04.11.9 2100
25  component¸¦ »ý¼ºÇؼ­ ´Ù¸¥ °÷¿¡¼­ È£ÃâÇÏ´Â ¹æ¹ý JMJS 04.11.4 2736
23  Array Of Array JMJS 04.8.16 2279
22  dumpfile, dumpvars JMJS 04.7.19 3983
21  Vending Machine Jamie 02.12.16 10421
20  Mini Vending Machine1 Jamie 02.12.10 7279
19  Mini Vending Machine Jamie 02.12.6 10108
18  Key Jamie 02.11.29 5321
17  Stop Watch Jamie 02.11.25 5833
16  Mealy Machine Jamie 02.8.29 7044
15  Moore Machine Jamie 02.8.29 18378
14  Up Down Counter Jamie 02.8.29 4422
13  Up Counter Jamie 02.8.29 3118
12  Edge Detecter Jamie 02.8.29 3319
11  Concept4 Jamie 02.8.28 2246
10  Concept3 Jamie 02.8.28 2379
9  Concept2_1 Jamie 02.8.28 2270
8  Concept2 Jamie 02.8.28 2354
7  Concept1 Jamie 02.8.26 2362
6  Tri State Buffer Jamie 02.8.26 3968
5  8x3 Encoder Jamie 02.8.28 4516
4  3x8 Decoder Jamie 02.8.28 4146
3  4bit Comparator Jamie 02.8.26 3532
2  °¡À§ ¹ÙÀ§ º¸ °ÔÀÓ Jamie 02.8.26 5656
1  Two Input Logic Jamie 02.8.26 2786
[1]