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Mini Vending Machine1
# 20 Jamie    02.12.10 12:07

1.Spec

   Mini vending machine1Àº mini vending machine°ú functionÀº µ¿ÀÏÇϳª
architecture¹®À» º¯ÇüÇÏ¿´½À´Ï´Ù.
   Ãâ·Â¿¡ ´ëÇØ °¢°¢ÀÇ process¹®À» »ç¿ëÇÏ¿© ȸ·Î¸¦ Á» ´õ »¡¸® ÀÌÇØÇϵµ·Ï ÇÏ¿´½À´Ï´Ù.
   µðÀÚÀο¡ µû¶ó Descriptin¹æ½ÄÀÌ ¾î´À °ÍÀÌ º¸´Ù È¿¿ïÀûÀÎÁö °áÁ¤µÇ°ÚÁö¸¸
ÇϳªÀÇ Ãâ·Â¿¡ ÇϳªÀÇ process¹®À» ÇÒ´çÇÏ´Â °ÍÀ» ¿ì¼±ÇÕ´Ï´Ù.

2.Input/Output



3.Timing



4.Block Diagram



5.VHDL Code : mini_vending_machine1.vhd
  Test Vector : mini_vending_machine1_tb.vhd

°Ô½Ã¹°: 96 °Ç, ÇöÀç: 1 / 1 ÂÊ
¹øÈ£ Á¦       ¸ñ ÀÛ¼ºÀÚ µî·ÏÀÏ ¹æ¹®
98  interface JMJS 25.1.20 248
97  test plusargs value plusargs JMJS 24.9.5 295
96  color text JMJS 24.7.13 300
95  draw_hexa.v JMJS 10.6.17 2504
94  jmjsxram3.v JMJS 10.4.9 2268
93  Verilog document JMJS 11.1.24 2882
92  [verilog]o=(c1)? (c2)? 0:1 : (c3)? 2:3; JMJS 09.3.31 2468
91  [verilog]forever, repeat, strobe, realtime, ... JMJS 09.7.6 3884
90  gtkwave PC version JMJS 09.3.30 2234
89  ncsim option example JMJS 08.12.1 4612
88  [¿µ»ó]keywords for web search JMJS 08.12.1 2242
87  [Verilog]fdisplay fopen fscanf JMJS 11.1.24 6490
86  ncverilog option example JMJS 10.6.8 8072
85  [Verilog]Latch example JMJS 08.12.1 2829
84  Pad verilog example JMJS 01.3.16 4737
83  [ModelSim] vector JMJS 01.3.16 2435
82  RTL Code ºÐ¼®¼ø¼­ JMJS 09.4.29 2716
81  [temp]PIPE JMJS 08.10.2 2088
80  [temp]always-forever ¹«ÇÑ·çÇÁ JMJS 08.10.2 2182
79  YCbCr2RGB.v JMJS 10.5.12 2372
78  [VHDL]rom64x8 JMJS 09.3.27 1955
77  [function]vector_compare JMJS 02.6.19 1865
76  [function]vector2integer JMJS 02.6.19 1993
75  [VHDL]ram8x4x8 JMJS 08.12.1 1844
74  [¿¹]shift JMJS 02.6.19 2252
73  test JMJS 09.7.20 2045
72  test JMJS 09.7.20 1755
71  test JMJS 09.7.20 1754
70  test JMJS 09.7.20 1849
69  test JMJS 09.7.20 1894
68  test JMJS 09.7.20 1843
67  test JMJS 09.7.20 1761
66  test JMJS 09.7.20 1741
65  test JMJS 09.7.20 1835
64  test JMJS 09.7.20 2044
63  test JMJS 09.7.20 2055
62  test JMJS 09.7.20 1977
61  VHDLÀÇ ¿¬»êÀÚ ¿ì¼±¼øÀ§ JMJS 09.7.20 3787
60  test JMJS 09.7.20 1687
59  test JMJS 09.7.20 1848
58  test JMJS 09.7.20 1823
57  test JMJS 09.7.20 1778
56  test JMJS 09.7.20 1832
55  verilog Çаú »ùÇð­ÀÇ JMJS 16.5.30 2375
54  [verilog]create_generated_clock JMJS 15.4.28 2348
53  [Verilog]JDIFF JMJS 14.7.4 1624
52  [verilog]parameter definition JMJS 14.3.5 1933
51  [verilog]sformat fopen fscanf fwrite fclose JMJS 12.1.31 4883
50  Verilog File I/0,Verilog file handling JMJS 12.1.30 2614
49  Verdi JMJS 10.4.22 3388
48  draw hexa JMJS 10.4.9 1977
47  asfifo - Async FIFO JMJS 10.4.8 1841
46  VHDLÀ» ÀÌ¿ëÇÑ È¸·Î¼³°èÀÇ ÀåÁ¡ JMJS 02.3.14 3500
45  synplify batch JMJS 10.3.8 2609
44  ÀüÀڽðè Type A JMJS 08.11.28 2136
43  I2C Webpage JMJS 08.2.25 1970
42  PC¿¡¼­ °£´ÜÈ÷ Verilog ½ÇÇàÇØº¸±â (Icarus Verilog) JMJS 13.1.14 6125
41  [Verilog]vstring JMJS 17.9.27 2199
40  Riviera Simple Case JMJS 09.4.29 3315
39  [VHDL]DES Example JMJS 07.6.15 3117
38  [verilog]RAM example JMJS 09.6.5 2880
37  ROM example [VerilogHDL, RTL] JMJS 04.5.27 2156
36  Jamie's VHDL Handbook JMJS 08.11.28 2823
35  Dualport RAM example [VerilogHDL, RTL] JMJS 04.5.27 3436
34  RTL Job JMJS 09.4.29 2289
33  [VHDL]type example - package TYPES JMJS 06.2.2 1901
32  [verilog]`define `ifdef `elsif `else `endif ... JMJS 10.5.11 9489
30  [verilog]array_module JMJS 05.12.8 2412
29  [verilog-2001]generate JMJS 05.12.8 3517
28  protected JMJS 05.11.18 2180
27  design¿¡ latch°¡ ÀÖÀ¸¸é ¾ÈµÇ³ª¿ä? JMJS 09.7.20 2979
26  busÀÇ µ¥ÀÌŸ¸¦ °¢ bitº°·Î Ãâ·ÂÇÏ´Â ¹æ¹ýÀº? JMJS 04.11.9 1956
25  component¸¦ »ý¼ºÇؼ­ ´Ù¸¥ °÷¿¡¼­ È£ÃâÇÏ´Â ¹æ¹ý JMJS 04.11.4 2601
23  Array Of Array JMJS 04.8.16 2118
22  dumpfile, dumpvars JMJS 04.7.19 3746
21  Vending Machine Jamie 02.12.16 10199
20  Mini Vending Machine1 Jamie 02.12.10 7084
19  Mini Vending Machine Jamie 02.12.6 9935
18  Key Jamie 02.11.29 5099
17  Stop Watch Jamie 02.11.25 5742
16  Mealy Machine Jamie 02.8.29 6846
15  Moore Machine Jamie 02.8.29 18154
14  Up Down Counter Jamie 02.8.29 4192
13  Up Counter Jamie 02.8.29 2880
12  Edge Detecter Jamie 02.8.29 3108
11  Concept4 Jamie 02.8.28 2166
10  Concept3 Jamie 02.8.28 2192
9  Concept2_1 Jamie 02.8.28 2080
8  Concept2 Jamie 02.8.28 2170
7  Concept1 Jamie 02.8.26 2324
6  Tri State Buffer Jamie 02.8.26 3679
5  8x3 Encoder Jamie 02.8.28 4295
4  3x8 Decoder Jamie 02.8.28 3952
3  4bit Comparator Jamie 02.8.26 3336
2  °¡À§ ¹ÙÀ§ º¸ °ÔÀÓ Jamie 02.8.26 5614
1  Two Input Logic Jamie 02.8.26 2578
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