JMJS 차한잔

설계이야기

사과장수이야기

Study-HDL

Script Tip

Perl Tip

C Memo

Python Memo

[Verilog]JDIFF

# 53

JMJS 14.7.4 10:46

//============================================================================//
module JDIFF
//============================================================================//
(
  input [8:0] iA,iB,
  output   [8:0]   oZ
);
//----------------------------------------------------------------------------//
wire   [8:0]   AB = iA - iB;
wire   [8:0]   BA = iB - iA;
assign   oZ=(~iA[8]&iB[8])? AB : (iA[8]&~iB[8])? BA : (AB[8])? BA : AB;
//============================================================================//
endmodule
//============================================================================//

첨부파일: JDIFF.v run.pl top.v

게시물: 96 건, 현재: 1 / 1 쪽
번호	제 목	작성자	등록일	방문
98	interface	JMJS	25.1.20	352
97	test plusargs value plusargs	JMJS	24.9.5	359
96	color text	JMJS	24.7.13	412
95	draw_hexa.v	JMJS	10.6.17	2563
94	jmjsxram3.v	JMJS	10.4.9	2537
93	Verilog document	JMJS	11.1.24	3108
92	[verilog]o=(c1)? (c2)? 0:1 : (c3)? 2:3;	JMJS	09.3.31	2718
91	[verilog]forever, repeat, strobe, realtime, ...	JMJS	09.7.6	4145
90	gtkwave PC version	JMJS	09.3.30	2531
89	ncsim option example	JMJS	08.12.1	4882
88	[영상]keywords for web search	JMJS	08.12.1	2482
87	[Verilog]fdisplay fopen fscanf	JMJS	11.1.24	6572
86	ncverilog option example	JMJS	10.6.8	8352
85	[Verilog]Latch example	JMJS	08.12.1	3075
84	Pad verilog example	JMJS	01.3.16	5028
83	[ModelSim] vector	JMJS	01.3.16	2703
82	RTL Code 분석순서	JMJS	09.4.29	2953
81	[temp]PIPE	JMJS	08.10.2	2362
80	[temp]always-forever 무한루프	JMJS	08.10.2	2448
79	YCbCr2RGB.v	JMJS	10.5.12	2594
78	[VHDL]rom64x8	JMJS	09.3.27	2160
77	[function]vector_compare	JMJS	02.6.19	2017
76	[function]vector2integer	JMJS	02.6.19	2283
75	[VHDL]ram8x4x8	JMJS	08.12.1	1975
74	[예]shift	JMJS	02.6.19	2450
73	test	JMJS	09.7.20	2322
72	test	JMJS	09.7.20	1808
71	test	JMJS	09.7.20	2051
70	test	JMJS	09.7.20	2125
69	test	JMJS	09.7.20	2171
68	test	JMJS	09.7.20	2116
67	test	JMJS	09.7.20	2055
66	test	JMJS	09.7.20	2011
65	test	JMJS	09.7.20	2125
64	test	JMJS	09.7.20	2291
63	test	JMJS	09.7.20	2348
62	test	JMJS	09.7.20	2237
61	VHDL의 연산자 우선순위	JMJS	09.7.20	4024
60	test	JMJS	09.7.20	1740
59	test	JMJS	09.7.20	2169
58	test	JMJS	09.7.20	2083
57	test	JMJS	09.7.20	2031
56	test	JMJS	09.7.20	2089
55	verilog 학과 샘플강의	JMJS	16.5.30	2447
54	[verilog]create_generated_clock	JMJS	15.4.28	2445
53	[Verilog]JDIFF	JMJS	14.7.4	1910
52	[verilog]parameter definition	JMJS	14.3.5	2188
51	[verilog]sformat fopen fscanf fwrite fclose	JMJS	12.1.31	5138
50	Verilog File I/0,Verilog file handling	JMJS	12.1.30	2714
49	Verdi	JMJS	10.4.22	3652
48	draw hexa	JMJS	10.4.9	2106
47	asfifo - Async FIFO	JMJS	10.4.8	1975
46	VHDL을 이용한 회로설계의 장점	JMJS	02.3.14	3676
45	synplify batch	JMJS	10.3.8	2879
44	전자시계 Type A	JMJS	08.11.28	2410
43	I2C Webpage	JMJS	08.2.25	2231
42	PC에서 간단히 Verilog 실행해보기 (Icarus Verilog)	JMJS	13.1.14	6260
41	[Verilog]vstring	JMJS	17.9.27	2396
40	Riviera Simple Case	JMJS	09.4.29	3494
39	[VHDL]DES Example	JMJS	07.6.15	3398
38	[verilog]RAM example	JMJS	09.6.5	3175
37	ROM example [VerilogHDL, RTL]	JMJS	04.5.27	2404
36	Jamie's VHDL Handbook	JMJS	08.11.28	3073
35	Dualport RAM example [VerilogHDL, RTL]	JMJS	04.5.27	3679
34	RTL Job	JMJS	09.4.29	2605
33	[VHDL]type example - package TYPES	JMJS	06.2.2	2002
32	[verilog]`define `ifdef `elsif `else `endif ...	JMJS	10.5.11	9718
30	[verilog]array_module	JMJS	05.12.8	2624
29	[verilog-2001]generate	JMJS	05.12.8	3775
28	protected	JMJS	05.11.18	2464
27	design에 latch가 있으면 안되나요?	JMJS	09.7.20	3148
26	bus의 데이타를 각 bit별로 출력하는 방법은?	JMJS	04.11.9	2109
25	component를 생성해서 다른 곳에서 호출하는 방법	JMJS	04.11.4	2766
23	Array Of Array	JMJS	04.8.16	2310
22	dumpfile, dumpvars	JMJS	04.7.19	4019
21	Vending Machine	Jamie	02.12.16	10448
20	Mini Vending Machine1	Jamie	02.12.10	7326
19	Mini Vending Machine	Jamie	02.12.6	10123
18	Key	Jamie	02.11.29	5350
17	Stop Watch	Jamie	02.11.25	5842
16	Mealy Machine	Jamie	02.8.29	7066
15	Moore Machine	Jamie	02.8.29	18411
14	Up Down Counter	Jamie	02.8.29	4470
13	Up Counter	Jamie	02.8.29	3156
12	Edge Detecter	Jamie	02.8.29	3350
11	Concept4	Jamie	02.8.28	2253
10	Concept3	Jamie	02.8.28	2411
9	Concept2_1	Jamie	02.8.28	2289
8	Concept2	Jamie	02.8.28	2368
7	Concept1	Jamie	02.8.26	2368
6	Tri State Buffer	Jamie	02.8.26	4003
5	8x3 Encoder	Jamie	02.8.28	4565
4	3x8 Decoder	Jamie	02.8.28	4187
3	4bit Comparator	Jamie	02.8.26	3569
2	가위 바위 보 게임	Jamie	02.8.26	5662
1	Two Input Logic	Jamie	02.8.26	2821

[1]