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RTL Code 분석순서
# 82 JMJS    09.4.29 07:44

Clock 먼저 분석

in, out port 분석
    Func 별로 구분
    waveform 안에서 구분해 놓을 것
    .rc file 만든것도 job 기록

Main Datapath 위주로 먼저 분석

가능하면 Simulation 환경 먼저 확보

Test Vector 분석
    Function 최대한 먼저 이해할 것
    Timing

scan등 Main Func이 아닌 부분은 처음에 제외하고 분석


작업일지 작성

Hier별로 모듈 분석
게시물: 96 건, 현재: 1 / 1 쪽
번호 제       목 작성자 등록일 방문
98  interface JMJS 25.1.20 240
97  test plusargs value plusargs JMJS 24.9.5 290
96  color text JMJS 24.7.13 295
95  draw_hexa.v JMJS 10.6.17 2499
94  jmjsxram3.v JMJS 10.4.9 2260
93  Verilog document JMJS 11.1.24 2872
92  [verilog]o=(c1)? (c2)? 0:1 : (c3)? 2:3; JMJS 09.3.31 2463
91  [verilog]forever, repeat, strobe, realtime, ... JMJS 09.7.6 3881
90  gtkwave PC version JMJS 09.3.30 2224
89  ncsim option example JMJS 08.12.1 4606
88  [영상]keywords for web search JMJS 08.12.1 2231
87  [Verilog]fdisplay fopen fscanf JMJS 11.1.24 6486
86  ncverilog option example JMJS 10.6.8 8067
85  [Verilog]Latch example JMJS 08.12.1 2818
84  Pad verilog example JMJS 01.3.16 4731
83  [ModelSim] vector JMJS 01.3.16 2427
82  RTL Code 분석순서 JMJS 09.4.29 2710
81  [temp]PIPE JMJS 08.10.2 2080
80  [temp]always-forever 무한루프 JMJS 08.10.2 2172
79  YCbCr2RGB.v JMJS 10.5.12 2361
78  [VHDL]rom64x8 JMJS 09.3.27 1951
77  [function]vector_compare JMJS 02.6.19 1861
76  [function]vector2integer JMJS 02.6.19 1990
75  [VHDL]ram8x4x8 JMJS 08.12.1 1839
74  [예]shift JMJS 02.6.19 2246
73  test JMJS 09.7.20 2035
72  test JMJS 09.7.20 1752
71  test JMJS 09.7.20 1750
70  test JMJS 09.7.20 1841
69  test JMJS 09.7.20 1889
68  test JMJS 09.7.20 1833
67  test JMJS 09.7.20 1751
66  test JMJS 09.7.20 1734
65  test JMJS 09.7.20 1825
64  test JMJS 09.7.20 2035
63  test JMJS 09.7.20 2049
62  test JMJS 09.7.20 1974
61  VHDL의 연산자 우선순위 JMJS 09.7.20 3774
60  test JMJS 09.7.20 1684
59  test JMJS 09.7.20 1842
58  test JMJS 09.7.20 1817
57  test JMJS 09.7.20 1773
56  test JMJS 09.7.20 1824
55  verilog 학과 샘플강의 JMJS 16.5.30 2373
54  [verilog]create_generated_clock JMJS 15.4.28 2346
53  [Verilog]JDIFF JMJS 14.7.4 1620
52  [verilog]parameter definition JMJS 14.3.5 1925
51  [verilog]sformat fopen fscanf fwrite fclose JMJS 12.1.31 4876
50  Verilog File I/0,Verilog file handling JMJS 12.1.30 2610
49  Verdi JMJS 10.4.22 3381
48  draw hexa JMJS 10.4.9 1973
47  asfifo - Async FIFO JMJS 10.4.8 1837
46  VHDL을 이용한 회로설계의 장점 JMJS 02.3.14 3494
45  synplify batch JMJS 10.3.8 2603
44  전자시계 Type A JMJS 08.11.28 2126
43  I2C Webpage JMJS 08.2.25 1965
42  PC에서 간단히 Verilog 실행해보기 (Icarus Verilog) JMJS 13.1.14 6117
41  [Verilog]vstring JMJS 17.9.27 2191
40  Riviera Simple Case JMJS 09.4.29 3310
39  [VHDL]DES Example JMJS 07.6.15 3104
38  [verilog]RAM example JMJS 09.6.5 2867
37  ROM example [VerilogHDL, RTL] JMJS 04.5.27 2148
36  Jamie's VHDL Handbook JMJS 08.11.28 2814
35  Dualport RAM example [VerilogHDL, RTL] JMJS 04.5.27 3431
34  RTL Job JMJS 09.4.29 2278
33  [VHDL]type example - package TYPES JMJS 06.2.2 1898
32  [verilog]`define `ifdef `elsif `else `endif ... JMJS 10.5.11 9481
30  [verilog]array_module JMJS 05.12.8 2406
29  [verilog-2001]generate JMJS 05.12.8 3512
28  protected JMJS 05.11.18 2173
27  design에 latch가 있으면 안되나요? JMJS 09.7.20 2971
26  bus의 데이타를 각 bit별로 출력하는 방법은? JMJS 04.11.9 1952
25  component를 생성해서 다른 곳에서 호출하는 방법 JMJS 04.11.4 2597
23  Array Of Array JMJS 04.8.16 2110
22  dumpfile, dumpvars JMJS 04.7.19 3738
21  Vending Machine Jamie 02.12.16 10193
20  Mini Vending Machine1 Jamie 02.12.10 7076
19  Mini Vending Machine Jamie 02.12.6 9933
18  Key Jamie 02.11.29 5090
17  Stop Watch Jamie 02.11.25 5739
16  Mealy Machine Jamie 02.8.29 6838
15  Moore Machine Jamie 02.8.29 18146
14  Up Down Counter Jamie 02.8.29 4185
13  Up Counter Jamie 02.8.29 2873
12  Edge Detecter Jamie 02.8.29 3103
11  Concept4 Jamie 02.8.28 2163
10  Concept3 Jamie 02.8.28 2188
9  Concept2_1 Jamie 02.8.28 2074
8  Concept2 Jamie 02.8.28 2167
7  Concept1 Jamie 02.8.26 2320
6  Tri State Buffer Jamie 02.8.26 3673
5  8x3 Encoder Jamie 02.8.28 4291
4  3x8 Decoder Jamie 02.8.28 3945
3  4bit Comparator Jamie 02.8.26 3328
2  가위 바위 보 게임 Jamie 02.8.26 5610
1  Two Input Logic Jamie 02.8.26 2575
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