LogIn E-mail
¼³°èÀ̾߱â
3x8 Decoder
# 4 Jamie    02.8.28 15:46

1.Spec

¿À´ÃÀº decoder¿¡ ´ëÇØ ¾Ë¾Æº¸°Ú½À´Ï´Ù.
decoder´Â  n bitÀÇ ÀÔ·ÂÀ» 2**nÀÇ ¼­·Î´Ù¸¥ Ãâ·ÂÀ¸·Î ¹Ù²Ù¾îÁÖ´Â ±âº»ÀûÀÎ Á¶ÇÕȸ·Î Áß
ÇϳªÀÔ´Ï´Ù. ¿¹¸¦µé¾î 38decoder¶ó Çϸé ÀÔ·ÂÀÌ 3bitÀ̹ǷΠ2**3=8 Áï, 8bitÀÇ Ãâ·ÂÀ»
³»º¸³»´Â °ÍÀ» ÀǹÌÇÕ´Ï´Ù.
decoderÀÇ functionÀº °¢°¢ÀÇ ÀÔ·Â Á¶°ÇÀ» case¹®À» ÀÌ¿ëÇÏ¿© Á¤ÀÇÇÑ ´ÙÀ½
ÇØ´ç ÀԷ°ª¿¡ ´ëÇÑ Ãâ·Â°ªÀ» Á¤ÀÇÇÏ¸é µË´Ï´Ù.

2.Input/Output



3.RTL Code : decoder38.vhd
  Test Vector : decoder38_tb.vhd

°Ô½Ã¹°: 96 °Ç, ÇöÀç: 1 / 1 ÂÊ
¹øÈ£ Á¦       ¸ñ ÀÛ¼ºÀÚ µî·ÏÀÏ ¹æ¹®
98  interface JMJS 25.1.20 329
97  test plusargs value plusargs JMJS 24.9.5 348
96  color text JMJS 24.7.13 388
95  draw_hexa.v JMJS 10.6.17 2543
94  jmjsxram3.v JMJS 10.4.9 2445
93  Verilog document JMJS 11.1.24 3038
92  [verilog]o=(c1)? (c2)? 0:1 : (c3)? 2:3; JMJS 09.3.31 2625
91  [verilog]forever, repeat, strobe, realtime, ... JMJS 09.7.6 4065
90  gtkwave PC version JMJS 09.3.30 2429
89  ncsim option example JMJS 08.12.1 4795
88  [¿µ»ó]keywords for web search JMJS 08.12.1 2394
87  [Verilog]fdisplay fopen fscanf JMJS 11.1.24 6546
86  ncverilog option example JMJS 10.6.8 8257
85  [Verilog]Latch example JMJS 08.12.1 2997
84  Pad verilog example JMJS 01.3.16 4934
83  [ModelSim] vector JMJS 01.3.16 2622
82  RTL Code ºÐ¼®¼ø¼­ JMJS 09.4.29 2869
81  [temp]PIPE JMJS 08.10.2 2266
80  [temp]always-forever ¹«ÇÑ·çÇÁ JMJS 08.10.2 2342
79  YCbCr2RGB.v JMJS 10.5.12 2537
78  [VHDL]rom64x8 JMJS 09.3.27 2086
77  [function]vector_compare JMJS 02.6.19 1986
76  [function]vector2integer JMJS 02.6.19 2191
75  [VHDL]ram8x4x8 JMJS 08.12.1 1924
74  [¿¹]shift JMJS 02.6.19 2382
73  test JMJS 09.7.20 2227
72  test JMJS 09.7.20 1791
71  test JMJS 09.7.20 1943
70  test JMJS 09.7.20 2031
69  test JMJS 09.7.20 2079
68  test JMJS 09.7.20 2017
67  test JMJS 09.7.20 1952
66  test JMJS 09.7.20 1897
65  test JMJS 09.7.20 2019
64  test JMJS 09.7.20 2213
63  test JMJS 09.7.20 2249
62  test JMJS 09.7.20 2140
61  VHDLÀÇ ¿¬»êÀÚ ¿ì¼±¼øÀ§ JMJS 09.7.20 3933
60  test JMJS 09.7.20 1723
59  test JMJS 09.7.20 2068
58  test JMJS 09.7.20 1977
57  test JMJS 09.7.20 1946
56  test JMJS 09.7.20 1985
55  verilog Çаú »ùÇð­ÀÇ JMJS 16.5.30 2430
54  [verilog]create_generated_clock JMJS 15.4.28 2414
53  [Verilog]JDIFF JMJS 14.7.4 1812
52  [verilog]parameter definition JMJS 14.3.5 2092
51  [verilog]sformat fopen fscanf fwrite fclose JMJS 12.1.31 5030
50  Verilog File I/0,Verilog file handling JMJS 12.1.30 2688
49  Verdi JMJS 10.4.22 3577
48  draw hexa JMJS 10.4.9 2079
47  asfifo - Async FIFO JMJS 10.4.8 1938
46  VHDLÀ» ÀÌ¿ëÇÑ È¸·Î¼³°èÀÇ ÀåÁ¡ JMJS 02.3.14 3617
45  synplify batch JMJS 10.3.8 2812
44  ÀüÀڽðè Type A JMJS 08.11.28 2303
43  I2C Webpage JMJS 08.2.25 2138
42  PC¿¡¼­ °£´ÜÈ÷ Verilog ½ÇÇàÇØº¸±â (Icarus Verilog) JMJS 13.1.14 6243
41  [Verilog]vstring JMJS 17.9.27 2343
40  Riviera Simple Case JMJS 09.4.29 3434
39  [VHDL]DES Example JMJS 07.6.15 3293
38  [verilog]RAM example JMJS 09.6.5 3070
37  ROM example [VerilogHDL, RTL] JMJS 04.5.27 2307
36  Jamie's VHDL Handbook JMJS 08.11.28 2998
35  Dualport RAM example [VerilogHDL, RTL] JMJS 04.5.27 3579
34  RTL Job JMJS 09.4.29 2516
33  [VHDL]type example - package TYPES JMJS 06.2.2 1972
32  [verilog]`define `ifdef `elsif `else `endif ... JMJS 10.5.11 9644
30  [verilog]array_module JMJS 05.12.8 2549
29  [verilog-2001]generate JMJS 05.12.8 3693
28  protected JMJS 05.11.18 2348
27  design¿¡ latch°¡ ÀÖÀ¸¸é ¾ÈµÇ³ª¿ä? JMJS 09.7.20 3087
26  busÀÇ µ¥ÀÌŸ¸¦ °¢ bitº°·Î Ãâ·ÂÇÏ´Â ¹æ¹ýÀº? JMJS 04.11.9 2078
25  component¸¦ »ý¼ºÇؼ­ ´Ù¸¥ °÷¿¡¼­ È£ÃâÇÏ´Â ¹æ¹ý JMJS 04.11.4 2710
23  Array Of Array JMJS 04.8.16 2236
22  dumpfile, dumpvars JMJS 04.7.19 3928
21  Vending Machine Jamie 02.12.16 10370
20  Mini Vending Machine1 Jamie 02.12.10 7235
19  Mini Vending Machine Jamie 02.12.6 10068
18  Key Jamie 02.11.29 5273
17  Stop Watch Jamie 02.11.25 5814
16  Mealy Machine Jamie 02.8.29 6986
15  Moore Machine Jamie 02.8.29 18337
14  Up Down Counter Jamie 02.8.29 4356
13  Up Counter Jamie 02.8.29 3048
12  Edge Detecter Jamie 02.8.29 3265
11  Concept4 Jamie 02.8.28 2233
10  Concept3 Jamie 02.8.28 2331
9  Concept2_1 Jamie 02.8.28 2224
8  Concept2 Jamie 02.8.28 2312
7  Concept1 Jamie 02.8.26 2355
6  Tri State Buffer Jamie 02.8.26 3912
5  8x3 Encoder Jamie 02.8.28 4459
4  3x8 Decoder Jamie 02.8.28 4100
3  4bit Comparator Jamie 02.8.26 3476
2  °¡À§ ¹ÙÀ§ º¸ °ÔÀÓ Jamie 02.8.26 5648
1  Two Input Logic Jamie 02.8.26 2729
[1]