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[verilog]forever, repeat, strobe, realtime, display, write
# 91 JMJS    09.7.6 09:20

`timescale 1 ns / 100 ps

module abc ();

reg                clk;
initial                clk=1;
always        #5        clk=~clk;

reg        [3:0]        count;
initial                count=0;
always @(posedge clk) count<=count+1;

repeat(100) @(posedge clk);

always @(negedge clk) $strobe("count=%d",count);

initial $timeformat(-6,3,"ms",8);
initial forever #1000 $display("time:%t %d",$time,count);
initial forever #1000 $display("real:%0.3fms %d",$realtime/1000,count);

initial forever #7 $display("%0.2fms count=%d",$realtime/100,count);
initial $display("\n %c"  ,`TESTV);
initial $write  ("\n %c\n",`TESTV);
 
initial begin
        $dumpfile("abc.vcd");
        $dumpvars;
        #1000 $finish;
end

endmodule
/*
$time ¡°now¡± as TIME
$stime ¡°now¡± as INTEGER
$realtime ¡°now¡± as REAL
$scale(hierid) Scale ¡°foreign¡± time value
$printtimescale[(path)] Display time unit & precision
$timeformat(unit#, prec#, ¡°unit¡±, minwidth) Set time %t display format
*/

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